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As per this command, we can see the quad mode is introduced during conversion from bitstream to binfile/mcsfile. So this is where we need to look to gain performance, rather than in the spiOverJtag Vivado settings
At the same time, in order to speed up the FPGA loading the mcs file in QSPI Flash after power-on, we can configure the bit file to 4-wire mode (provided that your hardware must support 4-wire mode), and modify the loaded clock frequency to greatly speed up the FPGA The startup speed.
That’s good, but do we know what’s different between the x4 bitstream and the x1 bitstream in terms of fasm statements?
I have not looked into that aspect. Just wanted to point out that this seems to be something that is/can be engraved into the bitstream configuration (and not just a binary stream).
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As per this command, we can see the quad mode is introduced during conversion from bitstream to binfile/mcsfile. So this is where we need to look to gain performance, rather than in the spiOverJtag Vivado settings
Originally posted by @unbtorsten and @jrrk2 in trabucayre/openFPGALoader#181 (comment)
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